View M48Z32V07_5060669.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

M48Z32V
3.3V, 256Kbit (32Kbit x 8) ZEROPOWER(R) SRAM
Features

Integrated, ultra low power SRAM, and powerfail control circuit READ cycle time equals WRITE cycle time Automatic power-fail chip deselect and WRITE protection WRITE protect voltages: (VPFD = Power-fail deselect voltage) - M48Z32V: 2.7V VPFD 3.0V Ultra-low standby current RoHS COMPLIANT - Lead-free second level interconnect
44 1

SO44 (MT) 44-pin SOIC
November 2007
Rev 3
1/19
www.st.com 1
Contents
M48Z32V
Contents
1 2 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 2.2 2.3 2.4 Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Write mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Data retention mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 VCC noise and negative going transients . . . . . . . . . . . . . . . . . . . . . . . . . 11
3 4 5 6 7
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/19
M48Z32V
List of tables
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Read mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Write mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 AC measurement load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Power down/up mode AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Power down/up AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Power down/up trip points DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SO44 - 44-lead plastic, small package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3/19
List of figures
M48Z32V
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 SOIC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Read mode AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Write enable controlled, write mode AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Chip enable controlled, write mode AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Supply voltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 SO44 - 44-lead plastic, small package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4/19
M48Z32V
Summary
1
Summary
The M48Z32V ZEROPOWER(R) RAM is a 32K x 8, non-volatile static RAM that integrates power-fail deselect circuitry and battery control logic on a single die. The 44-pin, 330mil SOIC provides a battery pin for an external, user-supplied battery. This is all that is required to fully non-volatize the SRAM. Figure 1. Logic diagram
VCC B+
15 A0-A14
8 DQ0-DQ7
W E G
M48Z32V
VSS
AI04787
Table 1.
Signal names
A0-A14 DQ0-DQ7 E G W VCC VSS B+ NC Address inputs Data inputs / outputs Chip enable input Output enable input WRITE enable input Supply voltage Ground Positive battery pin Not connected
5/19
Summary Figure 2. SOIC connections
M48Z32V
A14 A12 A7 A6 A5 A4 NF NC NC NC NC NC NC NC A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS
44 1 43 2 3 42 4 41 5 40 6 39 7 38 8 37 9 36 10 35 11 34 M48Z32V 12 33 13 32 14 31 15 30 16 29 17 28 27 18 19 26 20 25 21 24 22 23
VCC W A13 A8 A9 A11 G NC NC NC NC NC NC NC A10 CE DQ7 DQ6 DQ5 DQ4 DQ3 B+
AI04786
Note: Figure 3.
NF, Pin 7 must be tied to VSS. Block diagram
A0-A14
LITHIUM CELL VOLTAGE SENSE AND SWITCHING CIRCUITRY
POWER
32K x 8 SRAM ARRAY
DQ0-DQ7
VPFD
E W G
USER SUPPLIED
VCC
VSS
AI04788
6/19
M48Z32V
Operating modes
2
Operating modes
The M48Z32V also has its own Power-fail Detect circuit. The control circuitry constantly monitors the single power supply for an out of tolerance condition. When VCC is out of tolerance, the circuit write protects the SRAM, providing a high degree of data security in the midst of unpredictable system operation brought on by low VCC. As VCC falls below approximately VSO, the control circuitry connects the battery which maintains data until valid power returns. Table 2.
Mode Deselect WRITE READ READ Deselect Deselect VSO to VPFD (min)(1) 3.0 to 3.6V
Operating modes
VCC E VIH VIL VIL VIL X X G X X VIL VIH X X W X VIL VIH VIH X X DQ0-DQ7 High Z DIN DOUT High Z High Z High Z Power Standby Active Active Active CMOS standby Battery back-up mode
VSO(1)
1. See Table 12 on page 15 for details.
Note:
X = VIH or VIL; VSO = Battery back-up switchover voltage.
2.1
Read mode
The M48Z32V is in the READ Mode whenever W (WRITE Enable) is high, E (Chip Enable) is low. The device architecture allows ripple-through access of data from eight of 262,144 locations in the static storage array. Thus, the unique address specified by the 15 Address Inputs defines which one of the 32,768 bytes of data is to be accessed. Valid data will be available at the Data I/O pins within Address Access time (tAVQV) after the last address input signal is stable, providing that the E and G access times are also satisfied. If the E and G access times are not met, valid data will be available after the latter of the Chip Enable Access time (tELQV) or Output Enable Access time (tGLQV). The state of the eight three-state Data I/O signals is controlled by E and G. If the outputs are activated before tAVQV, the data lines will be driven to an indeterminate state until tAVQV. If the Address Inputs are changed while E and G remain active, output data will remain valid for Output Data Hold time (tAXQX) but will go indeterminate until the next Address Access.
7/19
Operating modes Figure 4. Read mode AC waveforms
tAVAV A0-A14 tAVQV tELQV E tELQX tGLQV G tGLQX DQ0-DQ7 VALID
AI00925
M48Z32V
VALID tAXQX tEHQZ
tGHQZ
Note: Table 3.
WRITE Enable (W) = High. Read mode AC characteristics
M48Z32V Parameter(1) Min tAVAV READ cycle time Address valid to output valid Chip enable low to output valid Output enable low to output valid Chip enable low to output transition Output enable low to output transition Chip enable high to output Hi-Z Output enable high to output Hi-Z Address transition to output transition 5 5 0 13 13 0 35 35 35 15
Symbol
-35 Max
Unit
ns ns ns ns ns ns ns ns ns
tAVQV tELQV tGLQV tELQX
(2)
tGLQX(2) tEHQZ(2) tGHQZ(2) tAXQX
1. Valid for ambient operating temperature: TA = 0 to 70C; Vcc = 3.0 to 3.6V (except where noted). 2. CL = 5pf (see Figure 8 on page 16).
2.2
Write mode
The M48Z32V is in the WRITE Mode whenever W and E are low. The start of a WRITE is referenced from the latter occurring falling edge of W or E. A WRITE is terminated by the earlier rising edge of W or E. The addresses must be held valid throughout the cycle. E or W must return high for a minimum of tEHAX from Chip Enable or tWHAX from WRITE Enable prior to the initiation of another READ or WRITE cycle. Data-in must be valid tDVWH prior to the end of WRITE and remain valid for tWHDX afterward. G should be kept high during WRITE cycles to avoid bus contention; although, if the output bus has been activated by a low on E and G, a low on W will disable the outputs tWLQZ after W falls.
8/19
M48Z32V Figure 5. Write enable controlled, write mode AC waveforms
tAVAV A0-A14 VALID tAVWH
Operating modes
tWHAX E tWLWH tAVWL W tWLQZ tWHDX DQ0-DQ7 DATA INPUT tDVWH
AI05662
tWHQX
Figure 6.
Chip enable controlled, write mode AC waveforms
tAVAV A0-A14 VALID tAVEH tAVEL E tAVWL W tEHDX DQ0-DQ7 DATA INPUT tDVEH
AI00927
tELEH
tEHAX
9/19
Operating modes Table 4. Write mode AC characteristics
M48Z32V Symbol Parameter(1) Min tAVAV tAVWL tAVEL tWLWH tELEH tWHAX tEHAX tDVWH tDVEH tWHDX tEHDX tWLQZ(2)(3) tAVWH tAVEH tWHQX(2)(3) WRITE cycle time Address valid to WRITE enable low Address valid to chip enable low WRITE enable pulse width Chip enable low to chip enable high WRITE enable high to address transition Chip enable high to address transition Input valid to WRITE enable high Input valid to chip enable high WRITE enable high to input transition Chip enable high to input transition WRITE enable low to output Hi-Z Address valid to WRITE enable high Address valid to chip enable high WRITE enable high to output transition 25 25 5 35 0 0 25 25 0 0 12 12 0 0 13 -35 Max
M48Z32V
Unit
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
1. Valid for ambient operating temperature: TA = 0 to 70C; VCC = 3.0 to 3.6V (except where noted). 2. CL = 5pF (see Figure 8 on page 16). 3. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
2.3
Data retention mode
With valid VCC applied, the M48Z32V operates as a conventional BYTEWIDETM static RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write protecting itself when VCC falls within the VPFD (max), VPFD (min) window. All outputs become high impedance, and all inputs are treated as "Don't care."
Note:
A power failure during a WRITE cycle may corrupt data at the currently addressed location, but does not jeopardize the rest of the RAM's content. At voltages below VPFD(min), the user can be assured the memory will be in a write protected state, provided the VCC fall time is not less than tF. The M48Z32V may respond to transient noise spikes on VCC that reach into the deselect window during the time the device is sampling VCC. Therefore, decoupling of the power supply lines is recommended. When VCC drops below VSO, the control circuit switches power to the external battery which preserves data. As system power returns and VCC rises above VSO, the battery is disconnected, and the power supply is switched to external VCC. Write protection continues until VCC reaches VPFD(min) plus tREC(min). Normal RAM operation can resume tREC after VCC exceeds VPFD(max). For more information on Battery Storage Life refer to the Application Note AN1012.
10/19
M48Z32V
Operating modes
2.4
VCC noise and negative going transients
ICC transients, including those produced by output switching, can produce voltage fluctuations, resulting in spikes on the VCC bus. These transients can be reduced if capacitors are used to store energy which stabilizes the VCC bus. The energy stored in the bypass capacitors will be released as low going spikes are generated or energy will be absorbed when overshoots occur. A ceramic bypass capacitor value of 0.1F (see Figure 7) is recommended in order to provide the needed filtering. In addition to transients that are caused by normal SRAM operation, power cycling can generate negative voltage spikes on VCC that drive it to values below VSS by as much as one volt. These negative spikes can cause data corruption in the SRAM while in battery backup mode. To protect from these voltage spikes, ST recommends connecting a schottky diode from VCC to VSS (cathode connected to VCC, anode to VSS). (Schottky diode 1N5817 is recommended for through hole and MBRS120T3 is recommended for surface mount). Figure 7. Supply voltage protection
VCC VCC
0.1F
DEVICE
VSS
AI02169
11/19
Maximum rating
M48Z32V
3
Maximum rating
Stressing the device above the rating listed in the "Absolute Maximum Ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.
Table 5.
Symbol TA TSTG TSLD(1) VIO VCC IO PD
Absolute maximum ratings
Parameter Ambient operating temperature Storage temperature (VCC Off, Oscillator Off) Lead solder temperature for 10 seconds Input or output voltages Supply voltage Output current Power dissipation Grade 1 SOIC Value 0 to 70 -55 to 125 260 -0.3 to VCC + 0.3 -0.3 to 4.6 20 1 Unit C C C V V mA W
1. For Lead-free (Pb-free) lead finish: Reflow at peak temperature of 260C (total thermal budget not to exceed 245C for greater than 30 seconds).
Caution:
Negative undershoots below -0.3V are not allowed on any pin while in the battery back-up mode.
12/19
M48Z32V
DC and AC parameters
4
DC and AC parameters
This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC Characteristic tables are derived from tests performed under the Measurement Conditions listed in Table 6: Operating and AC measurement conditions. Designers should check that the operating conditions in their projects match the measurement conditions when using the quoted parameters. Table 6. Operating and AC measurement conditions
Parameter(1) Supply voltage (VCC) Ambient operating temperature (TA) Load Capacitance (CL) Input rise and fall times Input pulse voltages Input and output timing ref. voltages
1. Output Hi-Z is defined as the point where data is no longer driven.
M48Z32V 3.0 to 3.6 Grade 1 0 to 70 50 5 0 to 3 1.5
Unit V C pF ns V V
Table 7.
AC measurement load circuit
DEVICE UNDER TEST
645
CL = 50pF or 5pF
1.75V
CL includes JIG capacitance
AI04789
Table 8.
Symbol CIN CIO
(3)
Capacitance
Parameter(1)(2) Input capacitance Input / output capacitance Min Max 10 10 Unit pF pF
1. Effective capacitance measured with power supply at 3.3V; sampled only, not 100% tested. 2. At 25C, f = 1MHz. 3. Outputs deselected.
13/19
DC and AC parameters Table 9.
Sym ILI ILO
(2)
M48Z32V
DC characteristics
Parameter Input leakage current Output leakage current Battery current Test condition(1) 0V VIN VCC 0V VOUT VCC TA = 40C; VCC = 0V VBAT = 3V IO = 0mA; Cycle Time = Min E = 0.2V, other input = VCC - 2V or 0.2V E = VIH E = VCC - 0.2V -0.3 2.2 IOL = 2.1mA IOH = -1mA 0.8VCC 0.2 Min Typ Max 1 1 1.2 Unit A A A
IBAT
ICC1 ICC2 ICC3 VIL
(3)
Supply current Supply current (TTL standby) Supply current (CMOS standby) Input low voltage Input high voltage Output low voltage Output high voltage
45 800 500 0.8 VCC + 0.3 0.4
mA A A V V V V
VIH VOL VOH
1. Valid for ambient operating temperature: TA = 0 to 70C; VCC = 3.0 to 3.6V (except where noted). 2. Outputs deselected. 3. Negative spikes of -1V allowed for up to 10ns once per cycle.
Table 10.
Power down/up mode AC waveforms
VCC VPFD (max) VPFD (min) VSO tF tFB tPD INPUTS
RECOGNIZED
tR tRB tDR DON'T CARE tREC
RECOGNIZED
HIGH-Z OUTPUTS VALID
(PER CONTROL INPUT)
VALID
(PER CONTROL INPUT)
AI01168C
14/19
M48Z32V Table 11.
Symbol tPD tF(2) tFB(3) tR tRB tREC
(4)
DC and AC parameters Power down/up AC characteristics
Parameter(1) E or W at VIH before power down VPFD (max) to VPFD (min) VCC fall time VPFD (min) to VSS VCC fall time VPFD (min) to VPFD (max) VCC rise time VSS to VPFD (min) VCC rise time VPFD (max) to inputs recognized Min 0 300 10 10 1 40 200 Max Unit s s s s s ms
1. Valid for ambient operating temperature: TA = 0 to 70C; VCC = 3.0 to 3.6V (except where noted). 2. VPFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring until 200s after VCC passes VPFD (min). 3. VPFD (min) to VSS fall time of less than tFB may cause corruption of RAM data. 4. tREC (min) = 20ms for industrial temperature Grade (6) device.
Table 12.
Symbol VPFD VSO
Power down/up trip points DC characteristics
Parameter(1)(2) Power-fail deselect voltage Battery back-up switchover voltage Min 2.7 Typ 2.85 VPFD - 100mV Max 3.0 Unit V V
1. All voltages referenced to VSS. 2. Valid for ambient operating temperature: TA = 0 to 70C or -40 to 85C; VCC = 3.0 to 3.6V (except where noted).
15/19
Package mechanical data
M48Z32V
5
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 8. SO44 - 44-lead plastic, small package outline
A2 B e
A C CP
D
N
E
H A1 L
1 SOH-C
Note:
Drawing is not to scale. Table 13.
Symbol Typ A A1 A2 B C D E e H L a N CP 0.81 0.05 2.34 0.36 0.15 17.71 8.23 - 11.51 0.41 0 44 0.10 Min Max 3.05 0.36 2.69 0.46 0.32 18.49 8.89 - 12.70 1.27 8 0.032 0.002 0.092 0.014 0.006 0.697 0.324 - 0.453 0.016 0 44 0.004 Typ Min Max 0.120 0.014 0.106 0.018 0.012 0.728 0.350 - 0.500 0.050 8
SO44 - 44-lead plastic, small package mechanical data
mm inch
16/19
M48Z32V
Part numbering
6
Part numbering
Table 14.
Example:
Ordering information scheme
M48Z 32V -35 MT 1 F
Device type M48Z
Supply voltage and write protect voltage 32V = VCC = 3.0 to 3.6V; VPFD = 2.7 to 3.0V
Speed -35 = 35ns
Package MT = 44-lead SOIC
Temperature range 1 = 0 to 70C
Shipping method E = Lead-free package (ECOPACK(R)), tubes F = Lead-free package (ECOPACK(R)), tape & reel
For other options, or for more information on any aspect of this device, please contact the ST sales office nearest you.
17/19
Revision history
M48Z32V
7
Revision history
Table 15.
Date Oct-2002 07-Nov-2002 22-Mar-2004
Document revision history
Revision 1.0 1.1 2.0 First Issue Update Absolute Maximum Ratings, DC Characteristics (Table 5, 8) Reformatted; updated Lead-free information (Table 5, 12) Reformatted; added lead-free second level interconnect information to cover page and Section 5: Package mechanical data; package name change from SOH44 to SO44 throughout document; updated Section 1: Summary; updated Table 3; 4, 5, 6, 9, 11, 13, 14 and Figure 8. Changes
02-Nov-2007
3.0
18/19
M48Z32V
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
(c) 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
19/19

▲Up To Search▲

Price & Availability of M48Z32V07

	To Download M48Z32V07 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .